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Date: Wed, 13 Dec 1995 19:13:02 -0500
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From: c404266@mizzou1.missouri.edu (John Ferrel)
To: Multiple recipients of list <lightwave@garcia.com>
Subject: Re: 060 speeds
X-Listprocessor-Version: 6.0c -- ListProcessor by Anastasios Kotsikonas
Status: RO
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> <BANDERSEN@DIRM.DHR.STATE.NC.US> writes:
>> I've read that if Lightwave were compiled on a 060-specific compiler it
>> would run faster (on a 060). Does anyone know:
Straight from the 68K newsgroup:
The '060 is designed as an upgrade from a '040 with 2.5 to 3.5 times the
performance of
the 25 mhz '040. It uses Superscalar pipelined architecture which means it
can perform more than one instruction at a time. The 68060 allows
simultaneous execution of two integer instructions (or 1 integer and 1 float
instruction) and one branch during each clock cycle. A branch cache allows
most branches to execute in zero cycles. This CPU has some RISC processor
features. The chip is all hardwired - there is no microcode in it. It
incorporates a JTAG interface to help simplify the debugging process.
The on-board caches have been increased to 8 Kbytes each and the '060 has
2.5 million transistors on the single die. ... The '060 offers 100 MIPS @
66mhz and 250 million operations per second @ 50mhz. SPECint = 50 @ 50Mhz.
I would think that code could be optimized for this architecture more than
